Project Description

New computing paradigms are required to feed the next revolution in Information Technology. Machines need to be invented that can learn, but also handle vast amount of data. In order to achieve this goal and still reduce the energy footprint of Information and Communication Technology, fundamental hardware innovations must be done. A physical implementation natively supporting new computing methods is required. Most of the time, CMOS is used to emulate e.g. neuronal behavior, and is intrinsically limited in power efficiency and speed.

Reservoir computing (RC) is one of the concepts that has proven its efficiency to perform tasks where traditional approaches fail. It is also one of the rare concepts of an efficient hardware realization of cognitive computing into a specific, silicon-based technology. Small RC systems have been demonstrated using optical fibers and bulk components. In 2014, optical RC networks based integrated photonic circuits were demonstrated. The PHRESCO project aims to bring photonic reservoir computing to the next level of maturity. A new RC chip will be co-designed, including innovative electronic and photonic component that will enable major breakthrough in the field. We will i) Scale optical RC systems up to 60 nodes ii) build an all-optical chip based on the unique electro-optical properties of new materials iii) Implement new learning algorithms to exploit the capabilities of the RC chip.

The hardware integration of beyond state-of-the-art components with novel system and algorithm design will pave the way towards a new era of optical, cognitive systems capable of handling huge amount of data at ultra-low power consumption.



Workpackage 1

The focus of this work package will on the fabrication, characterization and optimization of the non-linear components, programmable weights, amplifiers and detectors that are needed for upscaling and parallel processing of the reservoirs. We will study the performance of VO2 and BTO based non-linear components and the programmable weights. Then, the material that gives the best performance will be selected for the integration in the final design of the RC chip.

Workpackage 2

The focus of this work package will on the scaling up the currently available prototype to larger networks, with an on-chip readout and novel training approaches and investigating the scalability and cascadability of these RC networks.

Workpackage 3

The work in this work package is focused on integrating the material technologies developed in WP1 into silicon photonic circuits to ensure low-cost volume manufacturing of highly integrated optical reservoir computing systems. First, the integration of individual components such as optical weighting elements, amplifiers, and detectors will be demonstrated. At the end of WP3, the functionality of a medium-scale optical reservoir as well as the cascadability of small-scale reservoirs will be shown, combining previously developed materials and photonic circuits.

Workpackage 4

The work in this work package is focused to ensure full exploitation of the results & the protection of knowledge through IP and access rights.

Workpackage 5

The work in this work package is focused to promote the up-scale and use of the newly developed materials amongst specifically identified European and International companies as well as providing opportunities for these stakeholders to deliver feedback on the project results to identify future collaboration, and to facilitate a short time to market of the project results.

Workpackage 6

The work in this work package is to provide effective management and control of the project.





KULeuven Katholieke Universiteit Leuven (KU Leuven)
Prof. Jean-Pierre Locquet, Belgium,


IBM IBM Research GMBH, Switzerland,
ihp Innovations for high performance microelectronics (IHP), Germany,

Universiteit Gent Universiteit Gent, Belgium,;

CentraleSupelec CentraleSupélec, France,